Intel sat on 4 cores with exceptionally high power usage for a decade while everyone was screaming for more. This resulted in Apple starting up their own damn chip business, and AMD smashing through the wall with 6, 8, 12, and 16-core chips available to the masses; and core counts requiring a third damn digit if you go server. Furthermore, Intel’s process node is woefully behind TSMC’s.
Intel sat on their laurels and are getting shat on from all angles now.
I remember an ad Intel made about how AMD was “gluing their chips together”, being the chiplet design. In the end ram speeds continued to improve and thus the bottlenecks were alleviated, and now every design is the same.
@teppa Interface between chiplets still introduces latency. Perhaps photonics will eventually overcome this but it is currently an issue with chiplet designs.
Intel sat on 4 cores with exceptionally high power usage for a decade while everyone was screaming for more. This resulted in Apple starting up their own damn chip business, and AMD smashing through the wall with 6, 8, 12, and 16-core chips available to the masses; and core counts requiring a third damn digit if you go server. Furthermore, Intel’s process node is woefully behind TSMC’s.
Intel sat on their laurels and are getting shat on from all angles now.
16? You mean 96?
I remember an ad Intel made about how AMD was “gluing their chips together”, being the chiplet design. In the end ram speeds continued to improve and thus the bottlenecks were alleviated, and now every design is the same.
@teppa Interface between chiplets still introduces latency. Perhaps photonics will eventually overcome this but it is currently an issue with chiplet designs.