I’m looking at people running Deepseek’s 671B R1 locally using NVME drives at 2 tokens a second. So why not skip the FLASH and give me a 1TB drive using a NVME controller and only DRAM behind it? The ultimate transistor count is lower on the silicon side. It would be slower than typical system memory but the same as any NVME with a DRAM cache. The controller architecture for safe page writes in Flash and the internal boost circuitry for pulsing each page is around the same complexity as the memory management unit and constant refresh of DRAM and it’s power stability requirements. Heck, DDR5 and up is putting power regulation on the system memory already IIRC. Anyone know why this is not a thing or where to get this thing?
It’s not exactly what you’re talking about, but it looks like there is a way to do this over PCIe 5.0: CXL 1.1. The m.2 bus exposes up to 4 PCIe lanes, so it may be possible, with the right combination of motherboard that supports CXL, and a CXL module with an m.2 interface, to do what you want. I haven’t dug much deeper than that, but maybe it’ll be of some help.