During the company's third-quarter 2024 earnings call, Intel confirmed that its future laptop chips will return to the traditional use of RAM sticks, reversing Lunar Lake's radical...
Panther Lake and Nova Lake laptops will return to traditional RAM sticks
I’m wondering, the integrated RAM like Intel did for Lunar Lake, could the same performance be achieved with the latest CAMM modules? The only real way to go integrated to get the most out of it is doing it with HBM, anything else seems like a bad trade-off.
So either you go HBM with real bandwidth and latency gains or CAMM with decent performance and upgradeable RAM sticks. But the on-chip ram like Intel did is neither providing the HBM performance nor the CAMM modularity.
Especially with how normal memory tiering is nowadays, especially in the datacenter (Intel’s bread and butter) now that you can stick a box of memory on a CXL network and put the memory from your last gen servers you just retired into said box for a third or fourth tier of memory before swapping. And the fun not tiered memory stuff the CXL enables. Really CXL just enables so much cool stuff that it’s going to be incredible once that starts hitting small single row datacenters
The transfer speed isn’t the big issue, it’s the density and reliability. Packing more heat generating stuff onto the SoC package just makes it more difficult to dissipate. The transfer of data to where it needs to be is still the same, so the trade-off is pretty null in that sense except reduction of overall power consumption.
I’m wondering, the integrated RAM like Intel did for Lunar Lake, could the same performance be achieved with the latest CAMM modules? The only real way to go integrated to get the most out of it is doing it with HBM, anything else seems like a bad trade-off.
So either you go HBM with real bandwidth and latency gains or CAMM with decent performance and upgradeable RAM sticks. But the on-chip ram like Intel did is neither providing the HBM performance nor the CAMM modularity.
Look up intel i7 8709g
I wonder why both isn’t possible, build some into the chip but leave some DIMMs for upgradeability too at bit lower speed.
Especially with how normal memory tiering is nowadays, especially in the datacenter (Intel’s bread and butter) now that you can stick a box of memory on a CXL network and put the memory from your last gen servers you just retired into said box for a third or fourth tier of memory before swapping. And the fun not tiered memory stuff the CXL enables. Really CXL just enables so much cool stuff that it’s going to be incredible once that starts hitting small single row datacenters
The transfer speed isn’t the big issue, it’s the density and reliability. Packing more heat generating stuff onto the SoC package just makes it more difficult to dissipate. The transfer of data to where it needs to be is still the same, so the trade-off is pretty null in that sense except reduction of overall power consumption.