Safeguards against LSi may include :
Sensor-based detection ?
Error detection and correction ?
Redundancy and duplication ?
Shielding // physical + chemical protection ?
Anti-tamper mechanisms ?
Randomization and noise injection ?
It’s been ages since I read it so idr how much of it was at chip level. Really high end stuff have the secure chips in a tamper reactive enclosure so it’s difficult to get to them without first erasing the contents. The chapter discusses that ;).
Safeguards against LSi may include :
Sensor-based detection ?
Error detection and correction ?
Redundancy and duplication ?
Shielding // physical + chemical protection ?
Anti-tamper mechanisms ?
Randomization and noise injection ?
Why the question marks, the answer is always yes.
Because this is not my domain of expertise and I seek comments from other people.
Chapter from “Security Engineering” (2nd ed) about physical tamper resistance:
https://www.cl.cam.ac.uk/~rja14/Papers/SEv2-c16.pdf
It’s been ages since I read it so idr how much of it was at chip level. Really high end stuff have the secure chips in a tamper reactive enclosure so it’s difficult to get to them without first erasing the contents. The chapter discusses that ;).