Industrial and automotive industry demands seem likely to turn to RISC-V over Arm, says Omdia
  • baseless_discourse@mander.xyzEnglish
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    6 months ago

    I hope my next PC can be a risc-v one, ideally, open source OS, running on open source firmware, with a open source instruction set.

    I want to see everything open source band together, just so that I can be forced to use slack for work.

    Do you imagine slack will feel ashamed running on top of this many open source code?

  • Toes♀@ani.socialEnglish
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    6 months ago

    I remember reading that android dropped support for risc-v. I wonder if they will reverse that choice.

  • jwt@programming.devEnglish
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    6 months ago

    Sounds like wishful thinking to me. How is RISC-V stacking up to competitor architectures nowadays performance-wise? Last time I checked they were seriously lagging behind. Wouldn’t recent AI developments (constantly requiring more computing power) be especially something that would hinder RISC-V taking off in the next couple of years?

    • NeoNachtwaechter@lemmy.worldEnglish
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      6 months ago

      Wouldn’t recent AI developments (constantly requiring more computing power) be especially something that would hinder RISC-V taking off in the next couple of years?

      If you read the story again: the main message is that industry loves RISC V. Period. AI is only a side topic.

    • HakFoo@lemmy.sdf.orgEnglish
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      6 months ago

      I think the appeal is that you probably don’t need a huge CPU for a lot of workloads-- just something to run an OS, handle talking to the outside world, and configure the GPU/NPU complexes.

      I could imagine a something like a Quadro card that had a small RISC-V core built in as a freestanding device, no motherboard needed. Even if the CPU ran like a Core 2 Duo, that would be sufficient for purpose, but it will be a lot easier to license an appropriate RISC-V core than an x86 one.

    • Fried_out_Kombi@lemmy.worldEnglish
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      6 months ago

      The raison d’être for RISC-V is domain-specific architecture. Currently, computational demands are growing exponentially (especially with AI), but Moore’s Law is ending, which means we can no longer meet our computational demands by scaling single-core speed on general-purpose CPUs. Instead, we are needing to create custom architectures for handling particular computational loads to eke out more performance. Things like NPUs, TPUs, etc.

      The trouble is designing and producing these domain-specific architectures is expensive af, especially given the closed-source nature of computer hardware at the moment. And all that time, effort, and money just to produce a niche chip used for a niche application? The economics don’t economic.

      But with an open ISA like RISC-V, it’s both possible and legal to do things like create an open-source chip design and put it on GitHub. In fact, several of those exist already. This significantly lowers the costs of designing domain-specific architectures, as you can now just fork an existing chip and make some domain-specific modifications/additions. A great example of this is PERCIVAL: Open-Source Posit RISC-V Core with Quire Capability. You could clone their repo and spin up their custom RISC-V posit chip on an FPGA today if you wanted to.